12．5 Gb／s半速率时钟数据恢复电路(CDR)的 设计及6．25Gb／s SerDes接收芯片的系统集成，设计工艺均为TSMC 0．189in CMOS工艺。-aspects：Design of Half-rate 1 2．5 Gb／s Clock Data Recovery (CDR)and Integration of 6．25Gb／s SerDes receiver．Both are realized in TSMC 0．1 89m CMOS process．